This invention relates to a microcomputer provided with a power-save mode.
Recently, as a result of progress in CMOS techniques, microcomputers have been provided with a power-save mode for reducing power consumption. When a particular input signal is supplied or a particular instruction is executed, the ordinary operation mode of a microcomputer is shifted to a power-save mode. In the power-save mode, either a clock signal ceases to be supplied to the internal circuitry of a microcomputer, or "No Operation" (NOP) instruction is executed, thereby reducing power consumption in the microcomputer. Normally, the microcomputer is set to a power-save mode during battery backup.
The conventional microcomputer lacks means for informing an external section (for example, CMOS RAM, etc. constituting a system together with a microcomputer) that the microcomputer is set at a power-save mode. When, the microcomputer is set to a powersave save mode, another peripheral device included in the system cannot also be set to a power-save mode due to this lack of communication. In other words, the whole system fails to be set to a power-save mode, thereby wasting power.
When the microcomputer is set to a power-save mode by execution of a particular instruction, it is desired to change a main power source to a backup battery. Since, however, no instruction can be issued from a microcomputer, it has also been impossible to change a power source to a battery for backup when the microcomputer is set to a power-save mode.